EBRICK-ML
Introduction
The EBRICK-ML is a machine learning accelerator chiplet implemented in 12nm.
Block diagram
Core Features
- 3 TOPS peak performance AI accelerator
- Hardware accelerated ReLU/Softmax nonlinearities
- Hardware accelerated transpose
- 512KB on-chip buffers
- RISC-V RV64GC CPU
- 16KB L1 instruction cache
- 16KB L1 data cache
Connectivity Features
| Protocol | Quantity |
|---|---|
| CLINK (128gbps) | 4 |
| UART | 2 |
| I2C | 2 |
| GPIO | 64 |
| ETH 10/100/1000 | 1 |
| SDIO | 1 |
| SPI | 2 |
| QSPI | 1 |
| JTAG | 1 |
| PWM | 1 |
Software Components
Chiplet Dimensions
- 2mm x 2mm
Status & Availability
| Stage | Status |
|---|---|
| Test Chip | Q1, 2024 |
| Emulation | Available |
| Device Sampling | Q3, 2024 |